To change the accuracy of the A/D conversion result according to need and to eliminate the waste.

The processor contains an A/D converter 3 which repeats the sampling and bolding operations, based on the clock of the given frequency and digitizes the analog signals, a coordinate processing part 21 which averages (n) times of output of the converter 3 to acquire a single piece of processing data, and a sampling frequency control part 23 which varies the (n) times. In such a configuration, the sampling frequency (n) is varied and the digital data of the necessary accuracy can be acquired through an averaging operation.