Title:
アナログデジタルコンバータ
Document Type and Number:
Japanese Patent JP4540829
Kind Code:
B2
Abstract:
An analog to digital converter (ADC) circuit suitable for processing serial data at a fast rate includes a clock control block for receiving a reference strobe signal REF_STB, a reference clock signal REF_CLK, and number of bit control signals CONT-1, CONT-2. The clock control block outputs first and second internal clock signals CLK_A, and CLK_B, and a forwarding direction control signal CONT-3. The ADC circuit also includes a parallel analog to digital converter for receiving and converting analog signal into a parallel digital data synchronously with the first internal clock signal CLK_A. A parallel to serial transform logic control block then transforms the parallel digital data into serial digital data synchronously with the second internal clock signal CLK_B.
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Inventors:
Lee Daxing
Application Number:
JP2000326643A
Publication Date:
September 08, 2010
Filing Date:
October 26, 2000
Export Citation:
Assignee:
MAGNACHIP SEMICONDUCTOR LTD
International Classes:
H03M1/40; H03M1/10; H03M1/12; H03M9/00; H03M1/36
Domestic Patent References:
| JP1188028A | ||||
| JP6253022A | ||||
| JP5152955A | ||||
| JP58106915A |
Attorney, Agent or Firm:
Masaki Yamakawa
Shigeki Yamakawa
Hiroji Nakagawa
Shigeki Yamakawa
Hiroji Nakagawa