Title:
ANALOG-TO-DIGITAL CONVERTER
Document Type and Number:
Japanese Patent JPH03184424
Kind Code:
A
Abstract:
PURPOSE: To make it possible to drive the analog/digital(A/D) converter at high conversion frequency by activating a 2nd input of a highly weighted comparator by a clock signal to execute initialization by main voltage and driving a 1st input by a reverse clock signal to compare the 1st input with analog input voltage. CONSTITUTION: A voltage divider 2 applies four main reference voltage levels VP divided by regular steps to an output A. Each step is divided into five equal sub-steps. Thus the divider 2 impresses four secondary reference voltage levels VS to each main voltage VP and each secondary reference voltage VS corresponds to a voltage value between a pair of sub-steps. Sixteen secondary reference voltage levels can be used on the output B of the divider 2. When comparison is completed by a high weighted comparator and a specific phase is determined, coding device 6 controls a selector 14 so as to establish connection between the input E of the low weight comparator and the set of the output B based on a determined step.
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Inventors:
PATORISU SAN
ANDORE ABURIARU
ANDORE ABURIARU
Application Number:
JP26489490A
Publication Date:
August 12, 1991
Filing Date:
October 01, 1990
Export Citation:
Assignee:
FRANCE ETAT
International Classes:
H03M1/14; H03M1/36; (IPC1-7): H03M1/14; H03M1/36
Attorney, Agent or Firm:
Fukami Hisaro (2 outside)