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Patent Searching and Data


Title:
APPARATUS AND METHOD FOR TIME CONTROL OF CPU BOARD
Document Type and Number:
Japanese Patent JP2003066170
Kind Code:
A
Abstract:

To provide a time control apparatus for CPU board which is mounted easily and by which a method of dealing with the control of a network can be realized without stopping an operation due to a time change.

When a power supply is turned on at a transmission device 2, a CPU board 1 can be operated, and the time for an RTC 11 is set as the time for stating operation. When the time is set at the CPU board 1 by an OSI communication from an external terminal, an AP 13 calculates the difference between the time for the RTC 11 and the set time, and a calculated result is stored in a memory 16. When a setting processing operation is completed normally, the CPU board 1 makes a processed result respond to the external terminal 3 as a request source and an external terminal 4 other than it. After that, when a time acquisition request with reference to the CPU board 1 is received from the external terminals 3, 4, the AP 13 acquires the time in the reception of the acquisition request from the RTC 11, and the time in which the calculated result stored in the memory 16 is added or subtracted responds to the external terminals 3, 4.


Inventors:
YANAGI NORIO
Application Number:
JP2001258901A
Publication Date:
March 05, 2003
Filing Date:
August 29, 2001
Export Citation:
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Assignee:
NEC CORP
International Classes:
G04C9/04; G04G5/00; G06F13/00; (IPC1-7): G04G5/00; G06F13/00
Attorney, Agent or Firm:
Yanagi Kawa Shin