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Patent Searching and Data


Title:
ARITHMETIC UNIT FOR FLOATING POINT
Document Type and Number:
Japanese Patent JPH04205419
Kind Code:
A
Abstract:

PURPOSE: To attain high speed processing even when reserved data not expressing the number are inputted by forming the minimum and maximum values of exponents and the value of all-bit zero by a 3-bit signal obtained in parallel with code formation, mantissa operation, or exponent operation.

CONSTITUTION: This arithmetic unit is provided with a code forming means 29 for forming the code part of an operated result from the code part of an input and the sort of specified operation, an exponent computing means 6 for computing the exponent part of the input in accordance with the sort of operation and forming the exponent part of the operated result, a mantissa computing means 20 for computing the mantissa part of the input in accordance with the sort of operation and forming the mantissa part of the operated result, and other means. One bit of an integer part in which the minimum tag of an exponent is abbreviated and the least significant bit of an exponent inputted to the computing part 6 are determined, and when the maximum tag of one exponent out of the input is '1', a maximum value to be expressed as the exponent of an output is formed. When a tag indicating one mantissa zero out of the input is '1', the tag is regarded as a mantissa and the value of all-bit '0' is formed. Consequently high speed processing can be attained.


Inventors:
YASUTOME MIKAKO
SUZUKI MASATO
Application Number:
JP33825890A
Publication Date:
July 27, 1992
Filing Date:
November 30, 1990
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G06F7/00; G06F5/01; G06F7/76; (IPC1-7): G06F5/01; G06F7/00
Attorney, Agent or Firm:
Fumio Iwahashi (2 others)