Title:
ATM CELL TRANSMITTING DEVICE
Document Type and Number:
Japanese Patent JP3537991
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a FIFO memory with a capacitance satisfying the whole quality classes without providing the FIFO memories at every virtual channel and also to prevent a hardware quality from being vast by providing quality classes in accordance with transmission delay permission quantity in ATM.
SOLUTION: Cells are classified by quality class and stored in buffers 1n∼n and 21∼n. The cells are read out of the buffer of the quality class with high priority and shift is successively executed to the low-order ones. Otherwise a cell of the low-order class is inserted between the cells when there is a room in the transmission schedule of the cells in the high quality class with high priority. Thus, cell transmission which satisfies request quality as against transmission delay is executed with a small hardware quantity.
Inventors:
Umehira, Masahiro
Satou, Kiyoshi
Sugiyama, Takatoshi
Ota, Atsushi
Sagawa, Yuichi
Satou, Kiyoshi
Sugiyama, Takatoshi
Ota, Atsushi
Sagawa, Yuichi
Application Number:
JP11473597A
Publication Date:
June 14, 2004
Filing Date:
May 02, 1997
Export Citation:
Assignee:
NIPPON TELEGR & TELEPH CORP <NTT>
International Classes:
H04Q3/00; H04L12/28; (IPC1-7): H04L12/28; H04Q3/00
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