PURPOSE: To shorten the maximum wiring length and to reduce the wiring area, to reduce the size of the constitution, and to make the operation speed fast by simplify the layout of connection wiring.

CONSTITUTION: Selectors which constitute a selector group 11 with a (k)-bit (<n) shift quantity among plural selector groups are arrayed in the selector group 11. Namely, the selector group 11 consists of (n+k) selectors and selectors 0 - (n-1) among the selectors (i) (=0 - (n+k-1)) are arrayed in an area of the same bit corresponding to the bits 0 - (n-1) of (n)-bit array circuits 12a and 12b arranged one over the other in two stages. The selectors (n) - n+(k-1) among the selectors (i), on the other hand, are arrayed adjacently to low-order bit side selectors which are distant from adjacent selectors by bits of the shift quantity (k). Consequently, the connection wiring of the respective selector groups 11 is given an irregularity and the wiring network is simplified. Therefore, the maximum wiring length and wiring area are reduced, the constitution is reduced in size, and the operation speed is improved.