BINARIZING CIRCUIT, IMAGE PROCESSING METHOD AND COMPUTER PROGRAM

Title:

BINARIZING CIRCUIT, IMAGE PROCESSING METHOD AND COMPUTER PROGRAM

Document Type and Number:

Japanese Patent JP2006042031

Kind Code:

A

Abstract:

To provide a binarizing circuit capable of performing high-accuracy binarization.

The binarization circuit is provided with an extraction part 106 for extracting a noticed pixel to be binarized from an input image, an area designating part 108 for designating a sampling area for each noticed pixel, a detection part 110 for detecting two or more sampling values from a luminance signal of a pixel belonging to the sampling area, a calculation part 114 for calculating the threshold for binarizing the noticed pixel, on the basis of the average value of two or more sampling values, and a binarizing part 116 for binarizing the noticed pixel on the basis of the threshold. The sampling area is set in areas near the noticed pixel, the areas including the noticed pixel and different from each other for each noticed pixel.

Inventors:

HAMADA KAZUFUMI
YAMADA HIROMASA

Application Number:

JP2004220417A

Publication Date:

February 09, 2006

Filing Date:

July 28, 2004

Export Citation:

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Assignee:

SONY CORP

International Classes:

H04N1/403; G06T5/00

Attorney, Agent or Firm:

Miaki Kametani
Tetsuo Kanamoto
Koji Hagiwara

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