Title:
二値加算器
Document Type and Number:
Japanese Patent JP4481490
Kind Code:
B2
Abstract:
The present invention relates to an apparatus for determining the sum of first and second optical binary words. The apparatus uses a first optical logic gate and a second optical logic gate to generate respective first and second combination words which represent a logical combination of the binary words applied to the respective logic gates. The first and second combination words are then offset by one bit slot with respect to each other by an offsetting device to generate first and second offset combination words. These offset combination words are repeatedly fed back to the first and second logic gates. The binary sum of the original two words is given by the first combination word when each bit slot of the second combination words has the same logical state.
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Inventors:
Portey, Alistair James
Blow, Keith James
Manning, Robert John
Blow, Keith James
Manning, Robert John
Application Number:
JP2000539394A
Publication Date:
June 16, 2010
Filing Date:
December 08, 1998
Export Citation:
Assignee:
BRITISH TELECOMMUNICATIONS PUBLIC LIMITED COMPANY
International Classes:
G06E1/04; G06F7/50; G06F7/505
Domestic Patent References:
| JP58084343A | ||||
| JP55057948A | ||||
| JP60070424A |
Foreign References:
| GB2201534A |
Attorney, Agent or Firm:
Takehiko Suzue
Kurata Masatoshi
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Takashi Mine
Toshio Shirane
Sadao Muramatsu
Nobuhisa Nogawa
Kocho Chojiro
Naoki Kono
Katsu Sunagawa
Katsumura Hiro
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Takenori Masanori
Takuzo Ichihara
Yamashita Gen
Kurata Masatoshi
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Takashi Mine
Toshio Shirane
Sadao Muramatsu
Nobuhisa Nogawa
Kocho Chojiro
Naoki Kono
Katsu Sunagawa
Katsumura Hiro
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Takenori Masanori
Takuzo Ichihara
Yamashita Gen