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Title:
BIPHASE CODED DATA DECODING METHOD
Document Type and Number:
Japanese Patent JP2012244298
Kind Code:
A
Abstract:

To provide a biphase coded data decoding method.

A biphase coded data decoding method of the present invention works in such a way that falling edge conversions in biphase coded data are detected, and based on a time difference value between two adjacent falling edge conversions and a logic value of preceding one bit, suitable decoding is performed. When the time difference value is a 1 bit period and the preceding one bit is a logic 1, the current bit is determined to be a logic 1; when the time difference value is a 1 bit period and the preceding one bit is a logic 0, the current bit is determined to be a logic 0; when the time difference value is a 1.5 bit period and the preceding one bit is a logic 1, the current bit and following one bit are both logic 0s; when the time difference value is a 1.5 bit period and the preceding one bit is a logic 0, the current bit is determined to be a logic 1; when the time difference value is a 2 bit period and the preceding one bit is a logic 1, the current bit and following one bit respectively are determined to be a logic 0 and logic 1.


Inventors:
YANG SEON-BONG
GUO XIAOQIN
Application Number:
JP2011110599A
Publication Date:
December 10, 2012
Filing Date:
May 17, 2011
Export Citation:
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Assignee:
TPV ELECTRONICS (FUJIAN) CO LTD
International Classes:
H04L25/49; H03M5/12; H04L7/00
Domestic Patent References:
JPH0743736U1995-09-05
Attorney, Agent or Firm:
Takahisa Kimura



 
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