Title:
BONDING STRUCTURE FOR INTEGRATED CIRCUIT CHIP AND BONDING METHOD FOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH05129381
Kind Code:
A
Abstract:
PURPOSE: To provide bonding structure for integrated circuit chips which allow wiring leads to be plated with simplicity and, what is more, to be bonded with ease and a method of bonding an integrated circuit chip as well.
CONSTITUTION: Tin-inner-layer plating 21 and lead-outer plating of a wiring lead 20 form a thermal contact bonded section 21, which is thermally contact- bonded with a bump 11 of an integrated circuit chip 10, thereby producing tin/lead alloy.
Inventors:
NAYA KINICHI
Application Number:
JP32107991A
Publication Date:
May 25, 1993
Filing Date:
November 07, 1991
Export Citation:
Assignee:
CASIO COMPUTER CO LTD
International Classes:
H01L21/603; H01L21/60; (IPC1-7): H01L21/603