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Title:
BORING OF STANDARD-HOLE ONTO INNER-LAYER CIRCUIT BOARD
Document Type and Number:
Japanese Patent JPS60238208
Kind Code:
A
Abstract:

PURPOSE: To economically reduce the necessary time for working process by image-forming a standard hole mark which is inherent on an inner-layer circuit board and clarifying the image and carrying-out the binary conversion and thin- beam treatment, and positioning the image with a working tool and carrying-out boring, in the method for forming a standard hold onto an inner-layer circuit board.

CONSTITUTION: X-rays, infrared rays, or the visible rays due to a light-source lamp is used as the electromagnetic wave irradiated onto the part where the covering on an inner-layer circuit board 2 is scraped-off by an electromagnetic- wave generator 10. In the method for image-forming a standard hole mark which is inherent on the circuit board 2 by the reflected wave or the transmission wave of the irradiated electromagnetic wave, the transmission image or the reflected image of the standard mark is taken onto a scope, and clarified by the image processing by a computer and processed with the binary conversion or the thin- beam treatment, and displayed onto a monitor television 7. In this case, in the image processing by the computer, the standard mark can be searched speedily. Thus, the necessary time for the working process can be reduced.


Inventors:
KITAGAWA SHIROU
Application Number:
JP9109884A
Publication Date:
November 27, 1985
Filing Date:
May 09, 1984
Export Citation:
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Assignee:
SUMITOMO BAKELITE CO
International Classes:
B26D7/01; B23B49/00; B23Q17/24; B23Q35/02; G01B11/00; H05K3/00; H05K3/40; (IPC1-7): B23B49/00; B23Q17/00; B26D7/01; G01B11/00; H05K3/40
Domestic Patent References:
JP58140665B



 
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