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Patent Searching and Data


Title:
BOTTOM LEAD SEMICONDUCTOR PACKAGE
Document Type and Number:
Japanese Patent JPH10200021
Kind Code:
A
Abstract:

To improve heat-radiation efficiency for application to a semiconductor of high-power chip, by bonding a heat slag on upper and lower surface of a semiconductor chip through a bonding member excellent in heat conductivity, etc.

A second heat slag 7 is provided vertically on both side edges of a plate-like first heat slag 6, and on the upper surface of the first heat slag 6, a semiconductor chip 1 is bonded with the first bonding member 3 of high thermal conductivity. A third heat slag 8 is bonded with the second bonding member 3a of high heat conductivity at the upper-surface center part of the semiconductor chip 1, and on both sides of upper surface of the semiconductor chip 1, plural internal leads 2b where a bottom lead 2a is bent upward are bonded. The internal lead 2b and the chip pad of the semiconductor chip 1 are connected with a lead wire 4, and the inside space of the first third heat slags 6-8 are filled with resin to seal up the semiconductor chip 1, etc., so that a mold part 5 where the bottom lead 2a is exposed is formed.


Inventors:
CHUN DONG-SEOK
Application Number:
JP34091197A
Publication Date:
July 31, 1998
Filing Date:
December 11, 1997
Export Citation:
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Assignee:
LG SEMICON CO LTD
International Classes:
H01L23/28; H01L23/00; H01L23/12; H01L23/36; H01L23/433; H01L23/495; (IPC1-7): H01L23/36; H01L23/12; H01L23/28
Attorney, Agent or Firm:
Fumio Sasashima (1 person outside)