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Title:
BUFFER CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS62182850
Kind Code:
A
Abstract:

PURPOSE: To shorten the data processing time including the expansion processing by avoiding the overlap of a save data area with any other area.

CONSTITUTION: A compressed data area CDE where the compressed data is stored, an expanded data area EDE where the expanded data is stored, and a save data area SDE where the extra expanded data is stored are provided within a single buffer 121. Thus a buffer (for display) that stores the expanded data in an expansion circuit can be omitted. This decreases the number of buffers and therefore the overall buffer capacity and cost can be reduced. Furthermore the transfer of data from the buffer of the expansion circuit is also omitted. This can shorten the data processing time including the image expansion processing time.


Inventors:
KOYATA SHIGENORI
SAKURAI MITSUO
SATO NOBUYOSHI
Application Number:
JP2288586A
Publication Date:
August 11, 1987
Filing Date:
February 06, 1986
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F5/06; G06F12/02; G06T9/00; G06F12/04; (IPC1-7): G06F5/06; G06F12/02; G06F12/04; G06F15/62
Domestic Patent References:
JPS6119280A1986-01-28
JPS6024657A1985-02-07
JPS59173830A1984-10-02
Attorney, Agent or Firm:
Hideo Takino



 
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