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Patent Searching and Data


Title:
BUS ARBITRATING DEVICE
Document Type and Number:
Japanese Patent JPH07182278
Kind Code:
A
Abstract:

PURPOSE: To suppress time required for arbitration to its minimum and to arbitrate a bus at a high speed by monitoring request signals expressing bus using requests inputted from plural systems at the timing of an arbitration clock signal.

CONSTITUTION: An arbitration device 2 selects the shortest clock out of clocks S1 to S3 inputted from respective systems 4 to 6 and adops the selected clock as a clock for the device 2. Then, the device 2 monitors request signals S4 to S6 from respective systems 4 to 6 in accordance with the timing of the found clock. When the request signals S4/S5/S6 are inputted from respective systems 4/5/6, the device 2 selects an optional system out of the systems 4 to 6. In the case of receiving the request signal S4 e.g. from the selected system 4 e.g. the clock of the device 2 is changed from the shortest clock to the clock S1 of the selected system 4.


Inventors:
IMAHASHI KAZUYASU
Application Number:
JP34632693A
Publication Date:
July 21, 1995
Filing Date:
December 21, 1993
Export Citation:
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Assignee:
SONY CORP
International Classes:
G06F13/362; (IPC1-7): G06F13/362
Attorney, Agent or Firm:
Kei Tanabe