PURPOSE: To prevent the transition without decreasing the bus transfer amount by deciding the bus logic when the bus is not driven while being kept acquired by a processor as it is to release the bus after the bus is driven, and charging the bus when there is no other processor using the bus.
CONSTITUTION: The value of pullup resistor 5 is adjusted to take more than one clock to reach the time when the voltage of a bus 3 approximates the threshold. Controllers 14 and 15 do not charge the bus 3 when similar processors 1 and 2 drive the bus 3 in succession or when one of the processors 1 and 2 accesses the bus 3 followed by the drive of the bus 3 by the other. When the processors 1 and 2 drive the bus 3 without driving it for more than one clock after releasing it or when there is no processor in the processor 1 and 2 using the bus 3 after one of the processor 1 and 2 makes an access, the bus 3 is charged after release the bus 3.
SUDO KIYOSHI
OGURA KIMINARI
YAMAGUCHI TATSUYA
SAKURAI YASUTOMO
ODAWARA KOICHI
HOSHI KENJI
KANETANI EIJI
