Title:
BUS TESTING SYSTEM
Document Type and Number:
Japanese Patent JPS5741750
Kind Code:
A
Abstract:
PURPOSE: To increase the reliability of a monitor and test system, by providing a means to confirm that a testing bus transmits the test information or the working state information with no error.
CONSTITUTION: The initiation test information sent by a monitor and test device TST' to testing buses TBA and TBB from transmitting ports SA and SB' is sent back again to receiving ports RA' and RB of the device TST' in the form of the termination test information via the buses TBA and TBB that connect processors P1WPn. Then the termination information is compared with the initiation information to confirm whether the bus TBA transmits the control information of the device TST' to each of the processors P1WPn with no error.
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Inventors:
HARA KOUICHI
Application Number:
JP11664980A
Publication Date:
March 09, 1982
Filing Date:
August 25, 1980
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
G06F3/00; G06F11/22; G06F11/267; G06F13/00; G06F15/16; G06F15/177; H04L12/00; (IPC1-7): G06F3/00; G06F11/22; G06F15/16; H04L11/00