Title:
CMOSイメージセンサーのフォトダイオード、その製造方法及びイメージセンサーの製造方法
Document Type and Number:
Japanese Patent JP4390896
Kind Code:
B2
Abstract:
A CMOS image sensor according to the present invention has a low-voltage photodiode which is fully depleted at a bias of 1.2-4.5V. The photodiode comprises: a P-epi layer; a field oxide layer dividing the P-epi layer into a field region and an active region; a N- region formed within the P-epi layer, wherein the first impurity region is apart from the isolation layer; and a P0 region of the conductive type formed beneath a surface of the P-epi layer and on the N- region, wherein a width of the P0 region is wider than that of the N- region so that a portion of the P0 region is formed on the P-epi layer, whereby the P0 region has the same potential as the P-epi layer.
Inventors:
Yang Woodward
Lee Pil-Sun
Lee Lan I
Lee Pil-Sun
Lee Lan I
Application Number:
JP5323499A
Publication Date:
December 24, 2009
Filing Date:
March 01, 1999
Export Citation:
Assignee:
Crostec Capital, Limited Liability Company
International Classes:
H01L27/146; H01L27/144; H01L31/10; H04N5/335; H04N5/369; H04N5/372; H04N5/3745
Domestic Patent References:
| JP8335688A | ||||
| JP63174358A | ||||
| JP1147861A | ||||
| JP64014958A | ||||
| JP9252434A | ||||
| JP2054561A | ||||
| JP4038872A | ||||
| JP60018957A | ||||
| JP59198756A | ||||
| JP2131681A | ||||
| JP53086516A | ||||
| JP10308507A |
Attorney, Agent or Firm:
Shoichi Okuyama
Arihara Koichi
Matsushima Tetsuo
Hidefumi Kawamura
Naomi Yoshida
Ayako Nakamura
Fukagawa Eri
Satoshi Morimoto
Arihara Koichi
Matsushima Tetsuo
Hidefumi Kawamura
Naomi Yoshida
Ayako Nakamura
Fukagawa Eri
Satoshi Morimoto