To provide an efficient and simplified cache coherency protocol by sending a request from a first sub system to the cache row of a second sub system and blocking all new requests to the cache row of the second sub system until the request is served.

This system 400 is provided with the plural sub systems 410, 420,...480 connected with each other through global mutual connection 490. The respective sub systems, the sub system 410 for instance, are provided with one or plural processors 411a-411i, the corresponding number of memory management units 412a-412i and caches, a main memory 414 to which a part of a global memory address space is allocated, a global interface 415 and sub system mutual, connection 419. A 'blocking' function is executed by directories 416, 426,...486 or by adding dedicated blocking logic.