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Title:
CAPACITOR OF SEMICONDUCTOR DEVICE AND ITS FABRICATING METHOD
Document Type and Number:
Japanese Patent JP2003264246
Kind Code:
A
Abstract:

To provide a capacitor of a semiconductor device and its fabricating method.

The capacitor comprises an interlayer insulation film pattern arranged on a semiconductor substrate having an opening for exposing the upper surface of the semiconductor substrate, a silicide pattern formed on the semiconductor substrate exposed through the opening, and a lower electrode covering the inner wall of the opening where the silicide pattern is formed. The inner wall and upper surface of the lower electrode are coated with a dielectric film on which an upper electrode is arranged. An insulation film having high permittivity, e.g. a tantalum oxide film, is preferably employed as the dielectric film. The method for fabricating the capacitor comprises steps for forming an interlayer insulation film pattern on a semiconductor substrate having an opening for exposing the upper surface of the semiconductor substrate, for forming a silicide pattern on the exposed semiconductor substrate, for forming a lower electrode covering the inner wall of the opening where the silicide pattern is formed, and for forming a dielectric film and an upper electrode film sequentially thereon.


Inventors:
KIM DONG-WOO
OH JAE-HEE
Application Number:
JP2003028573A
Publication Date:
September 19, 2003
Filing Date:
February 05, 2003
Export Citation:
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Assignee:
SAMSUNG ELECTRONICS CO LTD
International Classes:
H01L27/04; H01L21/02; H01L21/822; H01L21/8242; H01L27/108; (IPC1-7): H01L21/8242; H01L21/822; H01L27/04; H01L27/108
Attorney, Agent or Firm:
Yasunori Otsuka (3 others)