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Title:
セラミック電子部品およびその製造方法
Document Type and Number:
Japanese Patent JP7338961
Kind Code:
B2
Abstract:
A ceramic electronic device includes: a multilayer chip in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked; a first external electrode provided on the first end face; and a second external electrode provided on the second end face, wherein a first dielectric layer of the plurality of dielectric layers has a concavity which is recessed toward one side of a stacking direction of the multilayer chip, wherein a first internal electrode layer of the plurality of internal electrode layers crosses the concavity and has a cutout in the concavity, wherein the first internal electrode layer is next to the first dielectric layer and is positioned on other side of the stacking direction.

Inventors:
Yuji Matsushita
Application Number:
JP2018210929A
Publication Date:
September 05, 2023
Filing Date:
November 08, 2018
Export Citation:
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Assignee:
TAIYO YUDEN CO.,LTD.
International Classes:
H01G4/30
Domestic Patent References:
JP57029130U
JP2003282350A
JP2011151089A
JP2017152674A
JP10022172A
JP5090064A
JP2002015942A
JP2012094819A
JP2001167968A
Attorney, Agent or Firm:
Shuhei Katayama