Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
1/N CHECK CIRCUIT
Document Type and Number:
Japanese Patent JPH05134017
Kind Code:
A
Abstract:

PURPOSE: To obtain a 1/n check circuit which can be expanded to a 1/(n×m) check circuit easily and checks that an output signal is output to one of n output lines.

CONSTITUTION: In a 1/n check circuit of a circuit which transmits an output signal to one of n output lines 4 by decoding an address information by a decoder 3, an address-screening means 5 for outputting an operation signal when it is detected that the address information which is input along with a control signal corresponds to an address of the output line is provided. Furthermore, an 1/n output confirmation means 6 which monitors the output signal and the operation signal, outputs a first potential display signal to a first confirmation display line 7 and a second confirmation display line 8 when no operation signal is output, and then outputs the first potential display signal to the first confirmation display line 7 and a second potential display signal to the second confirmation display line 8 when the operation signal is output and the output signal is output from only one of n output lines is provided.


Inventors:
TOKUHARA TOSHIKO
Application Number:
JP27146291A
Publication Date:
May 28, 1993
Filing Date:
October 18, 1991
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
FUJITSU LTD
International Classes:
G01R31/28; G11C17/00; G01R31/317; (IPC1-7): G01R31/28; G01R31/318; G11C17/00
Attorney, Agent or Firm:
Teiichi



 
Previous Patent: JPS5134016

Next Patent: FAULT SIMULATION METHOD