Title:
電子ユニットをアドレッシングするための回路
Document Type and Number:
Japanese Patent JP2007518066
Kind Code:
A
Abstract:
The invention relates to an addressing circuit for an array arrangement ( 100 ) of electronic units ( 101 ), which may be, for example, pixels of an X-ray detector. Every pixel ( 101 ) is connected to a spatially adjacent shift register ( 110 ), the shift registers ( 110 ) being connected in turn column-wise in series and also being connected to a common clock line ( 111,114 ). A trigger signal fed via an external trigger line ( 113 ) is passed by the shift registers ( 110 ) from row to row for every clock signal on the clock lines ( 111,114 ). In this process, triggered shift registers ( 110 ) activate the associate pixels ( 101 ) so that they can be read out via read-out lines ( 105 ) that extend column-wise.
Inventors:
Nassetti August
Lutten Walter
Lutten Walter
Application Number:
JP2006539026A
Publication Date:
July 05, 2007
Filing Date:
November 04, 2004
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G01N23/04; G01T1/17; G01T1/24; G09F9/30; G09G3/20; G09G3/32; G09G3/36; H04N3/15; H04N5/32
Domestic Patent References:
| JP2002090462A | 2002-03-27 |
Attorney, Agent or Firm:
Susumu Tsugaru
Akihiko Miyazaki
Fueda Shusen
Akihiko Miyazaki
Fueda Shusen