Title:
CIRCUIT FOR CONTROLLING TWO SIGNALS WHODE PHASES ARE APART FROM EACH OTHER BY 90 DEGREES
Document Type and Number:
Japanese Patent JPS62221213
Kind Code:
A
Abstract:
1. Circuit for controlling two signals approximately 90 degrees apart in phase (= first and second quadrature analog signals) (s1, s2) so as to obtain two signal waveforms having a phase difference of exactly 90 degrees and exactly equal amplitudes, comprising - a phase control stage containing a phase comparator and a low-pass filter, and - an amplitude control stage containing a first or second amplitude comparator, an averaging device, and a signal amplifier, characterized by the following features : - the control circuit (r) is a digital circuit ; - the first and second quadrature analog signals (s1, s2) are fed, respectively, to a first analog-to-digital converter (w1), which provides a first digital signal (d1), and to a second analog-to-digital converter (w2), which provides a second digital signal (d2) ; - the first and second digital signals (d1, d2) are each applied to one input of the control circuit (r), which provides a first quadrature signal (q1) and a second quadrature signal (q2) ; - the phase comparator in the phase control stage (pr), which provides a first phase-corrected digital signal (p1) and a second phase-corrected digital signal (p2), is a first multiplier (m1) which is fed with the first and second quadrature signals (q1, q2) and has its output connected to the low-pass filter (t), whose output is fed as a phase control value (p) to the first input of a second or third multiplier (m2, m3) ; - either - the second input of the second multiplier (m2) is fed with the first digital signal (d1), which is also the first phase-corrected digital signal (p1), and - the output signal from the second multiplier (m2) and the second digital signal (d2) are each applied to one input of an adder (ad), whose sum signal is the second phase-corrected digital signal (p2), - or - the second input of the third multiplier (m3) is fed with the second digital signal (d2), which is also the second phase-corrected digital signal (p2), and - the output signal from the third multiplier (m3) and the first digital signal (d1) are applied, respectively, to the subtrahend input (s) and the minuend input (m) of a first subtracter (sb1), whose output is the first phase-corrected digital signal (p1) ; - the signal amplifier contained in the amplitude control stage (ar), whose output signals are the first and second quadrature signals (q1, q2), is a fourth or fifth multiplier (m4, m5) whose first input is fed with an amplitude control value (g) from the averaging device (f), which has its input connected to the output of the first or second amplitude comparator (av1, av2) ; - the amplitude control stage (ar) adjusts the amplitudes of the respective frequency components to substantially identical values ; - either - the second input of the fourth multiplier (m4) is fed with the second phase-corrected digital signal (p2), and - the first phase-corrected digital signal (p1) is also the first quadrature signal (p1), which is applied to the minuend input (m) of the first amplitude comparator (av1), and - the output of the fourth multiplier (m4) is the second quadrature signal (q2), which is applied to the subtrahend input (s) of the first amplitude comparator (av1), - or - the second input of the fifth multiplier (m5) is fed with the first phase-corrected digital signal (p1), and - the second phase-corrected digital signal (p2) is also the second quadrature signal (q2), which is applied to the minuend input (m) of the second amplitude comparator (av2), and - the output of the fifth multiplier (m5) is the first quadrature signal (q1), which is applied to the subtrahend input (s) of the second amplitude comparator (av2).
Inventors:
ZENKE MEERUGARUTO
Application Number:
JP5543587A
Publication Date:
September 29, 1987
Filing Date:
March 12, 1987
Export Citation:
Assignee:
ITT IND GMBH DEUTSCHE
International Classes:
H03H17/08; H04N5/66; H04N7/06; H04N9/64; H04N9/66; (IPC1-7): H03H17/08
Attorney, Agent or Firm:
Takehiko Suzue