PURPOSE: To perform the SW detection and the burst position measurement using the same hardware by taking the reception data in a processor by means of a reception clock gated at a gate clock generation circuit.

CONSTITUTION: Reception data 110a for SW detection is taken as serial data and inputted directly to a processor 40. A clock phase difference counter 400 recognizes the leading edge of a terminal clock 30a outputted from a clock generation circuit to start counting of a k-times reception clock 20b and recognizes the leading edge of a symbol clock 10c to stop counting. A gate clock generation circuit 500 gates a clock 10c in synchronism with the reception reference slot pulse 20a, inputs a pulse 20a and a clock 10c to be gated in a time slot T unit, outputting the gate clock 210a and the reception slot pulse 210b. The processor 40 takes the reception data 110a, clock 210a, pulse 210b, and clock phase difference 400a as input, measuring the burst position.