Title:
CIRCUIT AND METHOD FOR OPERATING IT
Document Type and Number:
Japanese Patent JPH06350430
Kind Code:
A
Abstract:
PURPOSE: To provide a useful inverter for fast circuit application by resetting a set circuit after delay and transmitting a reset signal in a reset node in the formed direction. CONSTITUTION: An inverter 20 operates in the four states of a standstill state, a set state, a reset state and a restoring state. In the standstill state, the inverter 20 does not operate and waits for a pulse P to an input node. Then when the inverter 20 receives the positive transition of the pulse P, the set state is generated and negative transition is generated at a set node A responding to the set state. In addition, when the positive transition of the pulse P reaches a reset input node E, the reset state is generated. Then, negative transition is generated at the node C. Finally, in the state of the restoring state, the inverter 20 is made to prepare for receiving a new pulse by transition to the standstill state.
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Inventors:
DENISU ERU UENDERU
Application Number:
JP11736394A
Publication Date:
December 22, 1994
Filing Date:
April 19, 1994
Export Citation:
Assignee:
SUN MICROSYSTEMS INC
International Classes:
H03K19/017; H03K3/355; H03K5/13; H03K19/0948; (IPC1-7): H03K19/017; H03K19/0948
Attorney, Agent or Firm:
Masaki Yamakawa
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