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Title:
CIRCUIT SUBSTRATE INSTALLATION MECHANISM FOR ELECTRONIC WATCH
Document Type and Number:
Japanese Patent JPS55136980
Kind Code:
A
Abstract:

PURPOSE: To reduce thickness of a circuit substrate as a whole, by making it a layer structure in such a manner as to laminate glass-epoxy resin substrate on metallic sheet with adhesive.

CONSTITUTION: A circuit substrate 20 is formed into a layer structure by laminating a glass-epoxy resin substrate 20a onto a metallic sheet 21 with a filmlike adhesive 22. This metallic substrate 21 is to serve the purpose of reinforcing the glass-epoxy resin substrate 20a, and print wiring 23 is formed on the top surface of this substrate 20a, and further, a recess 20b is formed in a prescribed position on this metallic substrate 21 for keeping LSI6 which is to drive a watch. The LSI6 is molded by a molding material 6a in a condition that it is electrically conducted to the printed wiring 23. In the circuit substrate 20, a metallic post 24 is securely attached to a prescribed position on a frame 1 in a condition that the LSI6 is molded, and then, it is pressed into a fit-in hole on the circuit substrate 20 of layer structure to be securely attached.


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Inventors:
KOBAYASHI TSUNEO
Application Number:
JP4416779A
Publication Date:
October 25, 1980
Filing Date:
April 13, 1979
Export Citation:
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Assignee:
CASIO COMPUTER CO LTD
International Classes:
G04C3/00; G04G17/02; G04G17/04; G04G99/00; H05K1/00; (IPC1-7): G04C3/00; G04G1/00; H05K1/00
Domestic Patent References:
JP53091574B
JPS5435769A1979-03-16
JPS5377667A1978-07-10



 
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