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Title:
CLAMP CIRCUIT
Document Type and Number:
Japanese Patent JPH04322567
Kind Code:
A
Abstract:

PURPOSE: To attain accurate DC recovery for both FM transmission and AM transmission by implementing DC voltage recovery of a clamp circuit with the use of a clamp level signal for a vertical synchronizing signal period in the case of the FM transmission and with the use of this signal and a horizontal synchronizing signal in the case of the AM transmission.

CONSTITUTION: A MUSE signal inputted to an input terminal 21 is inputted to an A/D converter 25 via an amplifier 22, a capacitor 23 and an amplifier 24. Moreover, an output of the amplifier 22 is inputted to one terminal of a switch 28 via the capacitor 23 and a clamping resistor 27. The MUSE signal converted into a digital signal by an A/D converter 25 is inputted to a vertical synchronizing signal reference level detection DC potential setting circuit 31 and a horizontal synchronizing signal reference level detection circuit 32. An output of the circuit 32 is 0 when an FM transmission signal is received and a DC potential of the circuit 31 is fed to the switch 28. An output of the circuit 32 is a negative signal at AM transmission reception and an adder 30 adds outputs of the circuits 31,32 to give a DC potential to the switch 28 for the DC recovery.


Inventors:
IGARASHI YOICHI
Application Number:
JP9080491A
Publication Date:
November 12, 1992
Filing Date:
April 22, 1991
Export Citation:
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Assignee:
TOSHIBA CORP
TOSHIBA AVE KK
International Classes:
H04N5/16; H04N5/04; H04N7/00; H04N7/015; (IPC1-7): H04N5/16; H04N7/00
Attorney, Agent or Firm:
Takehiko Suzue



 
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