To output clamp control signals not causing the malfunction of a clamp circuit even in the case that vertical synchronizing signals before and dafter synchronizing separation are delayed (2H delay for instance) by the delay of a synchronizing separation circuit 16 or the like or the width of a vertical synchronizing period changes.
This clamp control circuit for inputting horizontal synchronizing signals HD and the vertical synchronizing signals VD after the synchronizing separation and outputting clamp control signals is provided with a mask signal generation circuit 32 for generating mask signals for which a mask period matches with the vertical synchronizing period of the vertical synchronizing signal V before the synchronizing separation on the basis of the input horizontal synchronizing signal HD, the input vertical synchronizing signal VD, mask start position data '2' and mask width data '5', a horizontal synchronizing signal output stop circuit 12 for stopping the input horizontal synchronizing signal HD only in the mask period of the mask signal and outputting it and a clamp control signal generation circuit 14 for generating the clamp control signals on the basis of the horizontal synchronizing signal HD2 outputted from the horizontal synchronizing signal output stop circuit 12.
| JP3305668 | DC COMPONENT RECOVERY DEVICE |
| JPH0522630 | SETUP CONTROL CIRCUIT |
NAKAJIMA MASAMICHI
ONODERA JUNICHI
TAKAGI NOBUYUKI
