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Title:
CLOCK CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPS558630
Kind Code:
A
Abstract:

PURPOSE: To generate always the same phenomenon under the same state by keeping always a fixed relation between refreshing clocks, which determine the refresh timing, and system clocks.

CONSTITUTION: Counters 5 and 4 to determine the refresh timing of dynamic MOS memory 1 are provided in the memory 1 side and the memory control unit 2 side respectively and this system is so constituted that continuous clocks can be supplied to these counters even in the interrupt time of system clocks. In case that the supply of system clocks is started after system clock stop, system clock control circuit 9 does not start the system clock supply operation immediately, but starts the supply of system clocks when coincidence circuit 8 detects that the value of counter 6' operated by free-running clocks agrees with the value of counter 6 operated by gated clocks.


Inventors:
TAKAHASHI MASAO
NAGANO MOTOZOU
Application Number:
JP7960378A
Publication Date:
January 22, 1980
Filing Date:
June 30, 1978
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G11C11/401; G06F1/04; G11C11/406; G11C29/00; G11C29/12; G11C29/56; (IPC1-7): G11C11/34; G11C29/00



 
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