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Patent Searching and Data


Title:
CLOCK INTERRUPTION DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH05191236
Kind Code:
A
Abstract:

PURPOSE: To provide the clock interruption detection circuit suitable for circuit integration with respect to the clock interruption detection circuit detecting the interruption of a clock sent externally.

CONSTITUTION: The circuit consists of a monitor counter 10 counting an internal clock, a flip-flop 11 receiving a carry output of the monitor counter 10 as a reset input and a detected clock as a clock respectively, a flip-flop 11 receiving a fixed value '1' as a data input, and a gate circuit 12 receiving a Q output of the flip-flop 11 as its 1st input, an output on the way of the monitor counter 10 to its 2nd input and its own output to its 3rd input, detecting clock interruption and outputting it as an error signal.


Inventors:
MURAKAMI TAKAO
KONO MIWAKO
Application Number:
JP642992A
Publication Date:
July 30, 1993
Filing Date:
January 17, 1992
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K5/19; G06F1/04; H03K19/00; (IPC1-7): H03K5/19; H03K19/00
Attorney, Agent or Firm:
Fujishima Ijima (1 outside)