Title:
CLOCK MONITOR DEVICE
Document Type and Number:
Japanese Patent JP2013187715
Kind Code:
A
Abstract:
To provide a clock monitor device that can appropriately detect a clock anomaly.
An ASIC 1 has an oscillator 11 for generating an ASIC clock signal CLK1, and an MCU clock monitor section 13 for monitoring an MCU clock signal CLK2 for an anomaly. An MCU 2 has an oscillator 21 for generating the MCU clock signal CLK2, and an ASIC clock monitor section 23 for monitoring the ASIC clock signal CLK1 for an anomaly. Such clock monitor functions can be executed on external independent chips to monitor mutual ECU internal clocks.
Inventors:
YANG YI-PING
KUMAGAI SHIN
KUMAGAI SHIN
Application Number:
JP2012050997A
Publication Date:
September 19, 2013
Filing Date:
March 07, 2012
Export Citation:
Assignee:
NSK LTD
International Classes:
H03K5/19; G06F1/04
Attorney, Agent or Firm:
Tetsuya Mori
Megumi Konishi
Hide Tanaka Tetsu
Ichi Hirose
Toru Miyasaka
Megumi Konishi
Hide Tanaka Tetsu
Ichi Hirose
Toru Miyasaka