Title:
CLOCK PREPARING METHOD IN PUNCTURED SYSTEM
Document Type and Number:
Japanese Patent JPS6458140
Kind Code:
A
Abstract:
PURPOSE: To prevent the occurrence of data disturbance and missing by generating a clock being 1/m of an original clock synchronously with a puncture circuit internal block timing and multiplying it with n-time.
CONSTITUTION: A punctured circuit 1 generates a frequency division clock being 1/4 (in general 1/m) of an original clock FEC CLK synchronously with a puncture circuit block timing. An n-multiple circuit 2 receives the 1/4 clock to generate an n-multiple clock MOD CLK. Then the data after punctured processing is sent as a transmission data synchronously with the clock MOD CLK. Thus, the phase between the clock and data is confirmed.
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Inventors:
YAMAGUCHI SEIICHI
Application Number:
JP21455087A
Publication Date:
March 06, 1989
Filing Date:
August 28, 1987
Export Citation:
Assignee:
FUJITSU LTD
International Classes:
H04L7/02; (IPC1-7): H04L7/02
Attorney, Agent or Firm:
Akira Yamatani
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