Title:
CLOCK SIGNAL ADJUSTING DEVICE
Document Type and Number:
Japanese Patent JP3833164
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To make the frequency of a clock signal of a single terminal coincide with the frequency of a clock signal of another terminal.
SOLUTION: A plurality of transceivers 4 are connected to a network 2. Each of the transceivers 4 includes a voltage controlled oscillator 23. A transmitter section 24 in predetermined one of these transceivers 4 transmits a signal for adjustment of a clock signal to another transceiver 4 via the network 2. A correction section 36 provided in the other transceiver 4 makes the frequency of the clock signal of the other transceiver 4 coincide with that of the clock signal of the predetermined transceiver 4 based on the clock-signal adjusting signal received via the network 2.
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Inventors:
Tou Kei
Application Number:
JP2002316214A
Publication Date:
October 11, 2006
Filing Date:
October 30, 2002
Export Citation:
Assignee:
TOA Co., Ltd.
International Classes:
H04L7/00; (IPC1-7): H04L7/00
Domestic Patent References:
| JP2000332802A | ||||
| JP2002051031A |
Attorney, Agent or Firm:
Masatoshi Kimura
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