PURPOSE: To prevent the malfunction of each processor by preventing the occurrence of delay and distortion of a clock signal accompanying the transmission of the clock signal to each processor via a bus.

CONSTITUTION: A sine wave clock generation circuit ZCK generates a sine wave clock CKW consisting of a sine wave signal and supplies this clock to the processors Z(1) to Z(n) respectively via a bus BS. Each of these processors converts the input sine wave clock CKWn into a rectangular wave by a clock conversion circuit Ct consisting of a Schmitt trigger circuit based on the threshold voltage VH and VL which are previously set so that the same rectangular waves are generated by each circuit Ct and also set equal to the cycle of the clock CKW. The rectangular wave acquired in such a way is supplied to each internal circuit Cu(n) as a rectangular wave clock CKPn, and the circuit Cu(n) carries out its processing in synchronism with the clock CKPn.