PURPOSE: To prevent mis-synchronization due to a spurious reference burst signal by using a loop filter in common for a sampling synchronous circuit and a circuit synchronizing with a highly stable clock source and providing a switch switching the synchronization of a loop circuit and changing its time constant to a loop filter.

CONSTITUTION: When a timing sampling the reference burst signal is not confirmed, switches SW3, ST3-1 are thrown to the position in dotted lines, and when a VCO 4 is synchronized with a frequency of a master clock oscillator 5, then an electric charge in response to a control voltage oscillating the VCO 4 is stored in a capacitor C of a lag/lead filter 9 and a loop filter of the frequency characteristic in matching with a signal synchronously with a highly stable clock source is obtained. When the sampling synchronization is started, the switches SW3, ST3-1 are thrown to the position in solid lines, since an electric charge in response to the control voltage of the VCO 4 is stored in the capacitor C, the fluctuation of the control voltage at the switching instance is absorbed thereby minimizing the voltage fluctuation at loop switching.