PURPOSE: To suppress the through current of an inverter and to prevent the generation of noise by providing a circuit, for which a Pch transistor, a resistor and an Nch transistor are parallely connected between a high potential power source line and a low potential power source line, in an input.

CONSTITUTION: When an input potential (a) is lower than a VTH of a Pch, a Pch transistor 1 goes to a turning-on condition and a potential (b) rises up to a High level. However, a potential (c) is left to an low level by the voltage fall due to a resistor 2 and such a condition continues until the potential (a) falls down to the VTH of an Nch. Next, when the potential (a) gets lower than the VTH of the Nch, only the Pch transistor 1 goes to the turning-on condition. Then, since the resistance value of an Nch transistor 3 in a turning-off condition is enough larger than the resistance value of the resistor 2, the potential (c) rises up to the High level. Thus, the transistor of a CMOS inverter output circuit 4 does not simultaneously go to the turning-on condition. Then, since a through current does not flow, the generation of the noise due to the through current is erased and quality can be improved.