PURPOSE: To improve a latchup resistance and to reduce the area of a chip in a relatively simple structure by forming a minority carrier extracting Schottky junction in an n-type region formed in a p-channel MOSFET in a region between an n-channel MOSFET and the p-channel MOSFET.

CONSTITUTION: When a positive surge voltage of power source voltage Vdd or higher is input to the output terminal 15 of a CMOS semiconductor device, hole (minority carrier) is implanted from the drain region 9 of a pMOS 13 to an n-type substrate region 1. When the holes are diffused in the region 1 to approach the region of a Schottky junction 23, the holes are absorbed to the junction 23 in which electrons are distributed as negative surface charge at a metal electrode 22 in low barrier height. Accordingly, the collector current of a transistor Q1 flowing into a p-type well 2 is suppressed. In this case, since the junction 23 and an n+ type substrate contact region 18 are connected by the common metal electrode 22 to the voltage Vdd, its layout and wirings can be simplified.