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Patent Searching and Data


Title:
CODING AND DECODING DEVICE
Document Type and Number:
Japanese Patent JPS6313522
Kind Code:
A
Abstract:

PURPOSE: To correct an error of a received code at a high speed by switching a generation polynomial used for coding/decoding of a feedback shift register, replacing the content of a flip-flop and applying shift till a zero detection circuit detects all zero.

CONSTITUTION: When a syndrome detection circuit 37 detects that an output of all flip-flops are not zero, a feedback shift register of a generation polynomial g(x) is used as a feedback shift register bringing a signal line 47 to a high level and realizing a polynomial obtained definitely as xl. g(1/x). Then the content of the flip-flop in the descending order from the most significant flip-flop sequentially is replaced with the content of the flip-flop in the ascending order from the least significant flipflop as to the content of each flip-flop of l-set constituting the feedback shift register. Then a zero detection circuit 38 repeats the shift until all the outputs of (l-m)-set of flip-flops are all zero and outputs the output of the m-set of the flip-flops as an erroneous pattern when the zero is detected.


Inventors:
TSUNEHIRO TAKASHI
HORIKAWA MARI
KAWAMURA TETSUSHI
MEGA MASAYUKI
Application Number:
JP15602186A
Publication Date:
January 20, 1988
Filing Date:
July 04, 1986
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
H03M13/00; (IPC1-7): H03M13/00
Attorney, Agent or Firm:
Katsuo Ogawa