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Patent Searching and Data


Title:
CODING SYSTEM
Document Type and Number:
Japanese Patent JPS5616923
Kind Code:
A
Abstract:

PURPOSE: To prevent the increase in DC component, by controlling the consecutive 0 or 1, through the specified maximum inversion interval, by controlling the coding in response to the number of accumulation of 2-bit binary signal 11,00 coded.

CONSTITUTION: The binary signal 0,1 in bit period T input from the terminal 8 is converted into the binary bit 00 or 01 for the signal 0 and 01 or 10 for the signal 1 depending on the bit coded immediately before, by means of the MFM code converter 20, and output from the OR gate 17 via the 4-bit buffer circuit 21. The output of the addition and subtraction circuits 26,27 is made to high level according to the difference of accumulated number of the binary bit 11,00, and the code conversion is controlled with the output of the memory circuits 24,25 storing the 4-bit 1..., 0... . Thus, the maximum inversion interval of the converted code is controlled to 2.5T to be the conversion code suppressed for the consecutive 0 or 1, allowing to increase the DC component. As a result, the conversion code for control in which malfunction is hardly taken place can be obtained.


Inventors:
KAWARABAYASHI SHIGEYUKI
SUGIYAMA YASUO
Application Number:
JP9122179A
Publication Date:
February 18, 1981
Filing Date:
July 17, 1979
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03M5/12; G11B5/09; G11B7/00; G11B7/004; G11B20/14; H03M7/00; H04L25/49; (IPC1-7): G11B5/09; G11B7/00; H04L25/49