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Patent Searching and Data


Title:
スリープモードと通常モードで動作可能な通信バスシステム
Document Type and Number:
Japanese Patent JP4242284
Kind Code:
B2
Abstract:
The communication bus system comprises a plurality of node circuits ( 10 a-d) and a relay circuit ( 12, 14, 16 ) coupling the node circuits ( 10 a-d). The relay circuit ( 12, 14, 16 ) has a transceiver circuit ( 124, 164 ) for relaying messages ( 21 ) between the node circuits ( 10 a-d) in a normal mode. The transceiver circuit ( 124, 164 ) is powered down in a sleep mode. A detector circuit ( 120, 160 ) detects an incoming message ( 41 ) when the relay circuit ( 12, 14, 16 ) is in a sleep mode. A mode control circuit ( 122, 162 ) powers up the transceiver ( 124, 164 ) in response to detection of an incoming message ( 21 ). Steps are taken that ensure, in the normal mode, that messages ( 21 ) will not be relayed in unreadable form. The mode control circuit ( 122, 162 ) is arranged to cause the transceiver ( 124, 164 ) to relay a remainder ( 25 ) of the incoming message ( 21 ) after power up. In an embodiment the power needed to transmit the remainder ( 25 ) of the message ( 21 ) is drained from a capacitor ( 306 ) in the power supply ( 30 ) before the power supply ( 30 ) controls the power supply voltage in the normal mode. In another embodiment the detector circuit ( 120, 160 ) temporarily controls the direction of operation of the transceivers ( 124, 164 ) at the start of the normal mode instead of further detectors ( 58 a-d) that normally control the direction of operation in the normal mode.

Inventors:
Patrick, Way. Her.
Hendrick, Bosen
Harm, hey boss
Stefan, H. A. Busseler
Application Number:
JP2003555321A
Publication Date:
March 25, 2009
Filing Date:
December 10, 2002
Export Citation:
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Assignee:
NXP B.V.
International Classes:
G06F1/26; G06F1/32; H04L29/00; G06F3/00; H04B1/38; H04L12/28; H04L12/44
Domestic Patent References:
JP7336381A
JP9275411A
JP2000261515A
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Takeshi Sekine
Takahashi