Title:
COMPARATOR CIRCUIT
Document Type and Number:
Japanese Patent JPH08288804
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a comparator having a high gain by providing a differential input step with an offset circuit composed of a resistor. SOLUTION: A comparator circuit 58 has a bias current circuit 60, differential input step 66 having built-in offset and hysteresis circuit 62. This built-in offset is generated by using a resistor 78 in the differential input step of comparator, and that resistor 78 is driven by a bias current and a current generated by the hysteresis circuit 62. Further, in the other execution style, a reset circuit is provided while using a comparator having the built-in offset. That reset circuit uses a voltage divider circuit for dividing a 1st input voltage to the comparator. A band gap reference voltage is used for supplying a 2nd input voltage to the comparator. Therefore, when the divided voltage reaches the value of band gap voltage + offset, the reset circuit generates a reset signal.
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Inventors:
ERITSUKU JIEI DANSUTOROOMU
Application Number:
JP8423796A
Publication Date:
November 01, 1996
Filing Date:
April 05, 1996
Export Citation:
Assignee:
SGS THOMSON MICROELECTRONICS
International Classes:
H03K3/2897; H03K3/0233; H03K3/353; H03K5/08; H03K5/24; H03K17/22; (IPC1-7): H03K5/08; H03K3/2897; H03K3/353
Attorney, Agent or Firm:
Kazuo Kobashi (1 person outside)
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