PURPOSE: To improve punch through withstand voltage, reduce diffusion capacitance, and realize high speed operation, by forming a first conductivity type region whose concentration is higher than a first conductivity type semiconductor region, in a second conductivity type channel region of an MOS type field effect transistor.

CONSTITUTION: In a first region 2 of a substrate 1 in which region an I/O circuit is formed, and a second region 3 in which an internal circuit is formed, P-type impurities, e.g. boron, are ion-implanted with dosage of 5×1012/cm2 and acceleration voltage of 160KeV, and a P-type high concentration region 7 is formed. The P-type high concentration region 7 is formed in a P well 4, so as to be at a position a little deeper than the well 4 surface. An N-type high concentration region 9 is formed in an N well 5, so as to be at a position a little deeper than the well 5 surface. Thereby punch through can be effectively formed. In the second region in which the internal circuit is formed, the concentration of the lower part of the source-drain region of each MOS transistor is low, so that diffusion capacitance is small and high speed operation can be realized.