PURPOSE: To stabilize the yield rate and to enhance the degree of freedom in a layout by preventing the effect of a side gate by a method wherein a Schottky junction type field-effect transistor is surrounded by the active layer which is retained by a source potential.

CONSTITUTION: An n-type working layer 2 is formed on a semiinsulative gallium arsenide substrate 1 using an ion-implanting method, and a Schottky gate electrode 8 is formed on the surface of the substrate located on then n-type working layer 2. On both side parts of the gate electrode 8, the + contact layers 3s and 3d of a source and a drain are formed utilizing a self-alignment method, for example. Also, in the frame-like region surrounding the above-mentioned active layers, a source potential layer 4 deeper that those active layers is formed. The active layers and the source potential layer 4 are activated by annealing. Moreover, a silicon oxide film 5 is applied on the whole surface including the gate electrode 8, and aperture is provided on the n+ contact layers 3s and 3d of the source and drain and the source potential layer 4 using a lift-off method, an ohmic electrode 6 consisting of AuGe and Ni is formed thereon, and it is alloyed.