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Title:
COMPUTER FOR BICYCLE
Document Type and Number:
Japanese Patent JP3231018
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To display much information while the number of contacts of a main unit is reduced by providing a sub-microprocessor for converting a received parallel signal to a serial signal and generating a synchronous clock signal, and controlling a display device through a main microprocessor.
SOLUTION: When a bicycle is traveled, a unidirectional parallel/serial signal converting circuit 320 in a sub-microprocessor 310 converts parallel signals from a wheel speed sensor 42, a pedal rotating speed sensor 52, a front gear sensor 60, a rear gear sensor 70 and a key button box 80 to serial signals. After conversion, the serial signals are transmitted to a main microprocessor 100 of a main unit 100. Simultaneously, the converting circuit 320 generates a synchronous clock signal to be transmitted to the main microprocessor 110. In the main microprocessor 110, identification, counting, computing and the other processings are executed, and the processing data required by a rider is displayed on a display device 200 of the main unit.


Inventors:
Tokai Etsuyoshi
yellow camellia tree
Application Number:
JP18002498A
Publication Date:
November 19, 2001
Filing Date:
June 26, 1998
Export Citation:
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Assignee:
SHIMANO INC.
Ecowell Electronic Company., Limited
International Classes:
B62J99/00; B62M9/12; B62M25/08; (IPC1-7): B62J39/00; B62M9/12; B62M25/08
Domestic Patent References:
JP6317601A
JP6203287A
JP717461A
JP796877A
JP8133165A
JP7282905A
JP4104088U
JP5992812U
JP516041Y2
Attorney, Agent or Firm:
Yukio Ono (1 person outside)