Title:
COMPUTER PROCESSING SYSTEM AND PROCESSING METHOD PERFORMED IN COMPUTER
Document Type and Number:
Japanese Patent JP3454808
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a computer architecture and programming model for high speed processing over broadband networks.
SOLUTION: The architecture employs a consistent modular structure, a common computing module and uniform software cells. The common computing module includes a control processor, a plurality of processing units, a plurality of local memories from which the processing units process programs, a direct memory access, controller and a shared main memory. A synchronized system and method for the coordinated reading and writing of data to and from the shared main memory by the processing units also are provided.
Inventors:
Masakazu Suzuoki
Go Yamazaki
Go Yamazaki
Application Number:
JP2002079358A
Publication Date:
October 06, 2003
Filing Date:
March 20, 2002
Export Citation:
Assignee:
株式会社ソニー・コンピュータエンタテインメント
International Classes:
G06F12/14; G06F15/16; G06F15/80; G06F21/62; H04L29/06; (IPC1-7): G06F12/14; G06F15/16
Domestic Patent References:
| JP9311839A | ||||
| JP5242057A | ||||
| JP612333A | ||||
| JP1217689A | ||||
| JP5412643A | ||||
| JP56123051A | ||||
| JP576952A | ||||
| JP57176456A | ||||
| JP6412364A | ||||
| JP4288643A | ||||
| JP9198361A | ||||
| JP11338833A |
Other References:
【文献】米国特許6526491(US,A)
【文献】特許3411273(JP,B2)
【文献】特許3411273(JP,B2)
Attorney, Agent or Firm:
Masago Suzuki (2 outside)