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Patent Searching and Data


Title:
COMPUTER SYSTEM AND METHOD FOR CONTROLLING CLOCK
Document Type and Number:
Japanese Patent JP2001166847
Kind Code:
A
Abstract:

To provide a computer system capable of saving the power consumption by suitably controlling the supply/interruption of a clock to a bridge device in accordance with the connection/disconnection of an extended unit.

The computer system is provided with the extended unit 200 connected so as to be optionally separated from a system body 100 in order to extend a function, and when the unit 200 is not connected to the computer body 100, the body 100 can be driven by power supplied from any of a built-in buttery and an AC power supply, and when the unit 200 is connected, both of the body 100 and unit 200 are driven by power taken in by the unit 200 from the AC power supply. When the disconnection of the unit 200 is detected, the supply of an operation clock to a P-PCI bridge 300a in a PCI-PCICI bridge 300 for mutually connecting the body 100 and the unit 200 is shut off.


Inventors:
NAGAE AKITO
ENOKIDO YOSHIO
Application Number:
JP34655999A
Publication Date:
June 22, 2001
Filing Date:
December 06, 1999
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
G06F1/16; G06F1/10; G06F13/36; (IPC1-7): G06F1/10; G06F13/36
Attorney, Agent or Firm:
Takehiko Suzue (6 outside)