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Patent Searching and Data


Title:
CONTROL CIRCUIT FOR MEMORY MULTIPLEX MODE
Document Type and Number:
Japanese Patent JPS6019257
Kind Code:
A
Abstract:

PURPOSE: To control the mode actions of plural memories with the same hardware constitution and to simplify the circuit constitution, by providing a register, a circuit which discriminates the using mode and a logical circuit into a memory card.

CONSTITUTION: In a memory extension mode a register 5 within a memory card is set at 1 to satisfy the conditions of an AND element 7. The packing information is fed to an exclusive OR element 8 and then compared with the address of a processor to a memory card. When the coincidence is obtained from said comparison, the control signals of tristate buffers 11 and 12 are effective to a memory array MA4. In a memory double structure mode, the conditions of the element 7 are not satisfied and the memory area is allotted to a lower memory address. Thus the read-in control carried out by a main system is decided by the value set to the register 5. With addition of the register 5, the mode actions of plural memories can be controlled. In such a way, the circuit constitution is simplified.


Inventors:
IWANO TATSUYA
Application Number:
JP12634183A
Publication Date:
January 31, 1985
Filing Date:
July 12, 1983
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F12/16; G06F12/00; G06F12/06; (IPC1-7): G06F12/06; G06F12/16
Attorney, Agent or Firm:
Naotaka Ide