PURPOSE: To access consistently data by providing a means inhibiting the hold of data in a buffer storage if a processor accesses a specific area.

CONSTITUTION: An address conversion table in a memory management unit 9 can be accessed from a microprocessor. When the value of an address signal 116 is an address in the address conversion table and a read signal 125 or a write signal 124 is on, address conversion is not executed and data reading or writing from/in the address conversion table is executed. In this case, both an operation end signal 128 and a signal 127 indicating write enabling/disabling status to a cache memory are turned on. In case of writing, a PURGE signal 126 is turned on, and when receiving the PURGE signal 126, a control circuit 13 turns on a signal 117 to invalid the whole cache memory 11.