PURPOSE: To improve the mounting efficiency of a control memory with no delay of a machine cycle by constituting a control memory which stores a microprogram of high-speed and low-speed memory elements, and discriminating the memory elements to be stored in accordance with the contents of the program.
CONSTITUTION: A control memory 1 fetches the address of a program from an address register AR8. The address information on a program counter PC2 or a high-speed memory element 11A of the memory 1 is supplied to the register AR8 from a data selector 6. A branch control part stored in a high-speed memory element 11B is supplied to a branch control circuit 4 and decoded there together with a branch condition signal 5 to be converted into a switch signal 7 of the selector 6. The selector 6 selects the address information of the PC2 or the branching destination address of the element 11A and outputs it to the register AR8. The part 1 reads out a low-speed memory element 12 by the address information fed from the register AR8 and outputs it to an instruction register IR3.
JPS55147740 | MICROPROGRAM CONTROL UNIT |
JPS57187747 | MICROPRGRAM CONTROLLED INFORMATION PROCESSING DEVICE |